High Bandwidth Memory (HBM)
3D-stacked DRAM architecture providing massive bandwidth for GPUs and AI accelerators
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GPU Computing
Graphics processing units and parallel computing concepts.
12
Concepts
All GPU Computing Concepts
GPU Memory Hierarchy & Optimization
Master GPU memory hierarchy from registers to global memory, understand coalescing patterns, bank conflicts, and optimization strategies for maximum performance
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NVIDIA Unified Virtual Memory
Automatic memory management between CPU and GPU through page faulting and on-demand migration
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Page Migration & Fault Handling
Understanding virtual memory page migration, fault handling, and TLB management in CPU-GPU systems
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NVIDIA Device Files in /dev/
Understanding character devices, major/minor numbers, and the device file hierarchy created by NVIDIA drivers for GPU access in Linux.
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CUDA Multi-Process Service (MPS)
Understand NVIDIA CUDA Multi-Process Service (MPS), a client-server architecture that enables multiple CUDA processes to share a single GPU context for concurrent kernel execution and better utilization.
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Understanding NVIDIA Kubernetes GPU Operator
Explore how the NVIDIA GPU Operator automates GPU infrastructure management in Kubernetes, transforming manual GPU setup into a declarative, cloud-native system.
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Understanding CUDA Contexts
Explore the concept of CUDA contexts, their role in managing GPU resources, and how they enable parallel execution across multiple CPU threads.
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Understanding NVIDIA Persistence Daemon
Eliminating GPU initialization latency through nvidia-persistenced - a userspace daemon that maintains GPU driver state for optimal startup performance.
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NCCL: High-Performance Multi-GPU Communication
Understanding NVIDIA's Collective Communications Library for distributed deep learning and multi-GPU training
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Tensor Cores: Accelerating Deep Learning
Understanding NVIDIA's specialized matrix multiplication hardware for AI workloads
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GPU Streaming Multiprocessor (SM)
Deep dive into the fundamental processing unit of modern GPUs - the Streaming Multiprocessor architecture, execution model, and memory hierarchy
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